This part of IEC 61156 describes correction procedures for the measurement results of return loss and input impedance.<\/p>\n
| PDF Pages<\/th>\n | PDF Title<\/th>\n<\/tr>\n | ||||||
|---|---|---|---|---|---|---|---|
| 4<\/td>\n | CONTENTS <\/td>\n<\/tr>\n | ||||||
| 5<\/td>\n | FOREWORD <\/td>\n<\/tr>\n | ||||||
| 7<\/td>\n | 1 Scope 2 Normative references 3 Acronyms <\/td>\n<\/tr>\n | ||||||
| 8<\/td>\n | 4 Return loss measurements 4.1 General 4.2 Return loss (RL) Figures Figure 1 \u2013 Return loss with and without junction reflections <\/td>\n<\/tr>\n | ||||||
| 9<\/td>\n | 4.3 Open\/short return loss (OSRL) 4.4 Structural return loss (SRL) Figure 2 \u2013 Return loss and open\/short return loss <\/td>\n<\/tr>\n | ||||||
| 10<\/td>\n | 5 Correction procedures 5.1 General Figure 3 \u2013 Return loss, open short return loss and structural return loss <\/td>\n<\/tr>\n | ||||||
| 11<\/td>\n | 5.2 Parasitic inductance corrected return loss (PRL) Figure 4 \u2013 Input impedance (magnitude) and operational return loss up to 2\u00a0GHz Figure 5 \u2013 Equivalent circuit for the corrective calculation <\/td>\n<\/tr>\n | ||||||
| 12<\/td>\n | 5.3 Gated return loss (GRL) <\/td>\n<\/tr>\n | ||||||
| 14<\/td>\n | 5.4 Fitted return loss (FRL) Figure 6 \u2013 Return loss with gating correction <\/td>\n<\/tr>\n | ||||||
| 17<\/td>\n | Figure 7 \u2013 Return loss and input impedance before any correction Figure 8 \u2013 Return loss and input impedance (with fitting) after fixture correction <\/td>\n<\/tr>\n | ||||||
| 18<\/td>\n | Figure 9 \u2013 Residual impedance (after fixture correction) and its fitting Figure 10 \u2013 Return loss and input impedance after complete correction <\/td>\n<\/tr>\n | ||||||
| 19<\/td>\n | Figure 11 \u2013 Return loss, with fixture correction vs. without fixture correction Figure 12 \u2013 Input impedance (real and imaginary part),with fixture correction vs. without fixture correction <\/td>\n<\/tr>\n | ||||||
| 20<\/td>\n | Annex A (informative) Comparison of gated return loss (GRL) with fitted return loss (FRL) Figure A.1 \u2013 Return loss, fitting vs. gating correction Figure A.2 \u2013 Real part of input impedance, fitting vs. gating correction <\/td>\n<\/tr>\n | ||||||
| 21<\/td>\n | Figure A.3 \u2013 Imaginary part of input impedance, fitting vs. gating correction <\/td>\n<\/tr>\n | ||||||
| 22<\/td>\n | Annex B (informative) Influence of the correction technique on return loss peaks Figure B.1 \u2013 Reflection coefficient of a Cat.6 data cable in polar coordinates without and with PRL-correction Figure B.2 \u2013 Return loss traces corresponding to Figure B.1 <\/td>\n<\/tr>\n | ||||||
| 23<\/td>\n | Figure B.3 \u2013 Reflection coefficient of a Cat.6 data cable in polar coordinates without and with PRL-correction Figure B.4 \u2013 Return loss traces corresponding to Figure B.3 <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":" Multicore and symmetrical pair\/quad cables for digital communications – Correction procedures for the measurement results of return loss and input impedance<\/b><\/p>\n |