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IEEE 1658 2012

IEEE 1658 2012

$73.13

IEEE Standard for Terminology and Test Methods of Digital-to-Analog Converter Devices

Published By Publication Date Number of Pages
IEEE 2012 126
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New IEEE Standard – Active. Terminology and test methods to clearly document prevalent world-wide terms used to describe and test digital-to-analog converters (DACs) are provided. It is restricted to monolithic, hybrid, and module DACs and does not cover systems encompassing DACs.

PDF Catalog

PDF Pages PDF Title
1 IEEE Std 1658-2011 Front Cover
3 Title page
6 Introduction
7 Notice to users
Laws and regulations
Copyrights
Updating of IEEE documents
Errata
Patents
8 Participants
10 Contents
13 Important Notice
1. Overview
1.1 Scope
14 1.2 Purpose
1.3 Discussion of scope and purpose
1.4 Digital-to-analog converter and analog-to-digital converter differences and similarities
16 1.5 Digital-to-analog converter background
23 1.6 Guidance to the user
1.6.1 Interfacing
1.6.2 Coding
25 1.6.2.1 Adjustment range
26 1.6.3 Test conditions
1.6.4 Test equipment
27 1.6.5 Test selection
1.7 Manufacturer supplied information
1.7.1 General information
1.7.2 Minimum specifications
28 1.7.3 Additional specifications
1.7.4 Critical DAC parameters
29 2. Normative references
30 3. Definitions, symbols, acronyms, and abbreviations
3.1 Definitions
38 3.2 Symbols
41 3.3 Acronyms and abbreviations
42 4. Test methods
4.1 General comments on test methods
4.2 Test setup
43 4.3 Static testing
44 4.4 Dynamic testing
46 4.5 Taking a record of data
5. Fitting sine waves
5.1 Curve fitting test method
47 5.1.1 Three-parameter versus four-parameter fit
5.2 Choice of frequencies and record length
5.3 Fine-scale frequency selection
48 5.4 Medium-scale frequency selection
5.5 Coarse-scale frequency selection
5.5.1 Comments on fine, medium, and coarse frequency selection
49 5.6 Selecting signal amplitudes
6. Digital input
6.1 Coding
6.2 Clock and data feedthrough
50 6.2.1 Clock and data feedthrough test method
51 6.3 Static input parameters
6.4 Timing parameters
7. Analog inputs
52 8. Analog output (single-ended and differential)
53 8.1 Output impedance
8.1.1 Output impedance test method
54 8.2 Short-circuit current
8.2.1 Short-circuit current test method
8.3 Compliance voltage for current-output DACs
8.3.1 Compliance voltage test method
8.4 Load current for voltage-output DACs
8.4.1 Load current test method for voltage-source DACs
55 8.5 Maximum usable dynamic range
8.5.1 Definition of maximum usable dynamic range
8.5.2 Test method for maximum usable dynamic range
The rms of the largest single tone output that can be generated from a DAC with a given FSR can be approximated by Equation (17):
9. Gain and offset (static and dynamic)
9.1 Static gain and offset (independently based)
56 9.1.1 Static gain and offset test method
Measure the code output levels as per 4.3. The transfer characteristic can then be represented by Equation (19).
57 9.2 Static gain and offset (terminally based)
9.2.1 Static gain and offset test method
9.3 Dynamic gain and offset
9.3.1 Dynamic gain error
58 10. Linearity (static and dynamic)
10.1 Integral nonlinearity
10.1.1 Integral nonlinearity test method
10.2 Differential nonlinearity
59 10.3 Monotonicity
10.4 Spurious free dynamic range (SFDR)
60 10.4.1 Spurious free dynamic range test method
61 10.4.2 Spurious free dynamic range discussion
62 11. Noise
63 11.1 Signal-to-noise and distortion ratio
11.1.1 Test setup for SINAD
64 11.1.2 Test method for SINAD in the time domain
65 11.1.3 Test method for SINAD in the frequency domain
66 11.1.4 Comments on attainable SINAD
67 11.2 Signal-to-noise ratio
11.2.1 Coherent-sampling test method for SNR
68 11.2.2 Comments on SINAD and SNR
11.3 1/f Noise
11.3.1 General discussion of 1/f noise
11.3.2 Test method for 1/f noise
69 11.3.3 Comments on 1/f noise
11.4 Effective number of bits
70 11.4.1 Test method for effective number of bits
11.4.2 Comment on ideal quantization error
11.4.3 Comments on test conditions and results of the SNR and ENOB tests
11.4.4 Comment on the relationship of SINAD and ENOB
71 11.5 Noise power ratio
11.5.1 Adjacent channel leakage power ratio
11.5.1.1 Test method for ACLR
12. Harmonic and spurious distortion
12.1 Total harmonic distortion
72 12.1.1 Total harmonic distortion test method
73 12.2 Intermodulation distortion
12.2.1 Intermodulation distortion test method using two tones
12.2.2 Comment on intermodulation distortion test method
12.3 Glitches
12.3.1 General comments on DAC glitches
75 12.3.2 Test method for DAC glitches
76 13. Step response parameters
13.1 General comments on step response parameters
13.2 Test method for acquiring an estimate of the step response
77 13.2.1 Comment on test results
13.3 Slew rate limit
13.3.1 Slew rate limit test method
13.4 Settling time parameters
13.4.1 Test method for settling time and short-term settling time
78 13.4.2 Comment on settling time
13.4.3 Filtering settling region of step for improved settling time measurement
80 13.5 Transition duration
13.5.1 Test method
13.5.2 Comment on pathological test results
81 13.5.3 Effects of a non-ideal step on transition duration and overshoot
13.5.4 Effect of time jitter on transition duration
13.6 Overshoot and precursors
82 13.6.1 Test method
14. Interference-related DAC parameters
14.1 Multitone power ratio
14.1.1 MTPR test method
83 14.2 Comments
14.3 Crosstalk (channel separation, channel isolation)
14.3.1 DC crosstalk measurement
85 14.3.2 AC channel-to-channel isolation test method
14.3.3 Digital crosstalk test method
14.3.4 Analog crosstalk measurement
14.3.5 Comment on crosstalk parameters measurement
14.4 Channel matching
86 14.4.1 Channel matching test method
14.4.2 Comment on channel matching
14.5 Channel skew
87 15. Frequency response parameters
15.1 General comments on frequency response parameters
15.2 Reference input bandwidth
88 15.2.1 Reference input bandwidth test method
15.2.2 Reference input bandwidth test method based on step response
15.3 Digital-to-analog-conversion frequency response
93 15.3.1 Digital-to-analog conversion frequency-response test using sine waves
15.3.2 Test method for frequency response from impulse or step response
94 16. Differential gain and phase
16.1 Differential gain and phase test method
95 17. Power supply parameters
17.1 Power supply currents
17.1.1 Power supply current test method
17.2 Power supply voltage effects
17.2.1 Power supply voltage effects test method
96 17.2.1.1 Comments on power supply rejection ratio
97 17.3 Ground currents
99 Annex A (informative) DAC architectures
A.1 Binary weighted
101 A.2 Resistor string
A.3 Segmented
102 A.4 R-2R
103 A.5 Delta-Sigma
104 A.6 PWM DAC
105 A.7 Multiple DAC architecture
106 Annex B (informative) Sine-wave fitting algorithms
B.1 An algorithm for three-parameter (known frequency) least-squares fit to sine wave data using matrix operations
108 B.2 An algorithm for four-parameter (general use) least-squares fit to sine-wave data using matrix operations
110 B.3 Comment on three-parameter versus four-parameter sine fit
111 Annex C (informative) Discrete Fourier transforms and windowing
C.1 Discrete Fourier transforms and windowing
113 C.2 Windowed DFT
C.3 Spectral averaging
C.4 Spectral leakage
115 C.5 Coherent sampling, sine fitting, and other means of dealing with spectral leakage
C.6 Useful windows and their characteristics
116 C.7 Choosing a window
117 Annex D (informative) Software considerations
D.1 Motivation
D.2 Test of software to fit waveforms
D.3 Test of discrete Fourier transform software
118 Annex E (informative) Base-Band Reconstruction process
E.1 Motivation
E.2 Data generation
124 Annex F (informative) Bibliography

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