BS EN IEC 62680-1-2:2018
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Universal Serial Bus interfaces for data and power – Common components. USB Power Delivery Specification
Published By | Publication Date | Number of Pages |
BSI | 2018 | 604 |
IEC 62680-1-2:2018 defines a power delivery system covering all elements of a USB system including: Hosts, Devices, Hubs, Chargers and cable assemblies. This specification describes the architecture, protocols, power supply behavior, connectors and cabling necessary for managing power delivery over USB at up to 100W. This specification is intended to be fully compatible and extend the existing USB infrastructure. It is intended that this specification will allow system OEMs, power supply and peripheral developers adequate flexibility for product versatility and market differentiation without losing backwards compatibility. This third edition cancels and replaces the second edition published in 2017 and constitutes a technical revision. It is also identified as Version 1.1 + ECNs through 12 June 2017. Markup includes ECNs through 12-June-2017: – Add VPD Product Type – Specification Revision Interoperability – VCONN_Swap Clarification – Chapter 7 Source and Sink Behavior – Battery Numbering – Chunking Clarification – FR_Swap State Operation – GoodCRC Specification Revision – Slew Rate Exception for Source
PDF Catalog
PDF Pages | PDF Title |
---|---|
2 | undefined |
5 | FOREWORD |
7 | INTRODUCTION |
9 | Editors Contributors |
17 | Revision History |
18 | INTELLECTUAL PROPERTY DISCLAIMER |
19 | CONTENTS |
39 | 1 Introduction 1.1 Overview |
40 | 1.2 Purpose 1.3 Scope 1.4 Conventions 1.4.1 Precedence |
41 | 1.4.2 Keywords |
42 | 1.4.3 Numbering 1.5 Related Documents |
43 | 1.6 Terms and Abbreviations Tables Table 1-1 Terms and Abbreviations |
50 | 1.7 Parameter Values |
51 | 1.8 Changes From Revision 2.0 1.9 Compatibility with Revision 2.0 2 Overview 2.1 Introduction |
53 | 2.2 Section Overview |
54 | 2.3 Revision 2.0 Changes and Compatibility 2.3.1 Changes From Revision 2.0 2.3.2 Compatibility with Revision 2.0 |
55 | 2.4 USB Power Delivery Capable Devices Figures Figure 2-1 Logical Structure of USB Power Delivery Capable Devices |
56 | 2.5 SOP* Communication 2.5.1 Introduction 2.5.2 SOP* Collision Avoidance 2.5.3 SOP Communication 2.5.4 SOPā/SOPāā Communication with Cable Plugs |
57 | Figure 2-2 Example SOPā Communication between Vconn Source and Cable Plug(s) |
58 | 2.6 Operational Overview 2.6.1 Source Operation |
61 | 2.6.2 Sink Operation |
63 | 2.6.3 Cable Plugs |
64 | 2.7 Architectural Overview Figure 2-3 USB Power Delivery Communications Stack |
65 | Figure 2-4 USB Power Delivery Communication Over USB |
66 | 2.7.1 Policy Figure 2-5 High Level Architecture View |
67 | 2.7.2 Message Formation and Transmission 2.7.3 Collision Avoidance |
68 | 2.7.4 Power supply 2.7.5 DFP/UFP 2.7.6 Vconn Source |
69 | 2.7.7 Cable and Connectors 2.7.8 Interactions between Non-PD, BC and PD devices 2.7.9 Power Rules 3 USB Type-A and USB Type-B Cable Assemblies and Connectors 4 Electrical Requirements 4.1 Interoperability with other USB Specifications 4.2 Dead Battery Detection / Unpowered Port Detection |
70 | 4.3 Cable IR Ground Drop (IR Drop) 4.4 Cable Type Detection |
71 | 5 Physical Layer 5.1 Physical Layer Overview 5.2 Physical Layer Functions |
72 | 5.3 Symbol Encoding Table 5-1 4b5b Symbol Encoding Table |
73 | 5.4 Ordered Sets Figure 5-1 Interpretation of ordered sets Table 5-2 Ordered Sets Table 5-3 Validation of Ordered Sets |
74 | 5.5 Transmitted Bit Ordering Figure 5-2 Transmit Order for Various Sizes of Data Table 5-4 Data Size |
75 | 5.6 Packet Format 5.6.1 Packet Framing Figure 5-3 USB Power Delivery Packet Format Table 5-5 SOP ordered set |
76 | Table 5-6 SOPā ordered set Table 5-7 SOPāā ordered set |
77 | 5.6.2 CRC Table 5-8 SOPā_Debug ordered set Table 5-9 SOPāā_Debug ordered set |
78 | Figure 5-4 CRC 32 generation Table 5-10 CRC-32 Mapping |
79 | 5.6.3 Packet Detection Errors 5.6.4 Hard Reset Table 5-11 Hard Reset ordered set |
80 | 5.6.5 Cable Reset Figure 5-5 Line format of Hard Reset Table 5-12 Cable Reset ordered set |
81 | 5.7 Collision Avoidance 5.8 Biphase Mark Coding (BMC) Signaling Scheme Figure 5-6 Line format of Cable Reset Table 5-13 Rp values used for Collision Avoidance |
82 | 5.8.1 Encoding and signaling Figure 5-7 BMC Example Figure 5-8 BMC Transmitter Block Diagram |
83 | Figure 5-9 BMC Receiver Block Diagram Figure 5-10 BMC Encoded Start of Preamble |
84 | Figure 5-11 Transmitting or Receiving BMC Encoded Frame Terminated by Zero with High-to-Low Last Transition |
85 | Figure 5-12 Transmitting or Receiving BMC Encoded Frame Terminated by One with High-to-Low Last Transition |
86 | Figure 5-13 Transmitting or Receiving BMC Encoded Frame Terminated by Zero with Low to High Last Transition |
87 | 5.8.2 Transmit and Receive Masks Figure 5-14 Transmitting or Receiving BMC Encoded Frame Terminated by One with Low to High Last Transition Figure 5-15 BMC Tx āONEā Mask |
88 | Figure 5-16 BMC Tx āZEROā Mask Table 5-14 BMC Tx Mask Definition, X Values Table 5-15 BMC Tx Mask Definition, Y Values |
90 | Figure 5-17 BMC Rx āONEā Mask when Sourcing Power |
91 | Figure 5-18 BMC Rx āZEROā Mask when Sourcing Power Figure 5-19 BMC Rx āONEā Mask when Power neutral |
92 | Figure 5-20 BMC Rx āZEROā Mask when Power neutral Figure 5-21 BMC Rx āONEā Mask when Sinking Power |
93 | Figure 5-22 BMC Rx āZEROā Mask when Sinking Power Table 5-16 BMC Rx Mask Definition |
94 | 5.8.3 Transmitter Load Model Figure 5-23 Transmitter Load Model for BMC Tx from a Source Figure 5-24 Transmitter Load Model for BMC Tx from a Sink |
95 | 5.8.4 BMC Common specifications 5.8.5 BMC Transmitter Specifications Table 5-17 BMC Common Normative Requirements Table 5-18 BMC Transmitter Normative Requirements |
96 | Figure 5-25 Transmitter diagram illustrating zDriver |
97 | Figure 5-26 Inter-Frame Gap Timings |
98 | 5.8.6 BMC Receiver Specifications Table 5-19 BMC Receiver Normative Requirements |
99 | Figure 5-27 Example Multi-Drop Configuration showing two DRPs |
100 | Figure 5-28 Example Multi-Drop Configuration showing a DFP and UFP |
101 | 5.9 Built in Self-Test (BIST) 5.9.1 BIST Carrier Mode 5.9.2 BIST Test Data Figure 5-29 Test Data Frame |
102 | 6 Protocol Layer 6.1 Overview 6.2 Messages 6.2.1 Message Construction |
103 | Figure 6-1 USB Power Delivery Packet Format including Control Message Payload Figure 6-2 USB Power Delivery Packet Format including Data Message Payload |
104 | Figure 6-3 USB Power Delivery Packet Format including an Extended Message Header and Payload Table 6-1 Message Header |
107 | Table 6-2 Revision Interoperability during an Explicit Contract |
108 | Table 6-3 Extended Message Header |
110 | Figure 6-4 Example Security_Request sequence Unchunked (Chunked bit = 0) Table 6-4 Use of Unchunked Message Supported bit |
111 | Figure 6-5 Example byte transmission for Security_Request Message of Data Size 7 (Chunked bit is set to 0) Figure 6-6 Example byte transmission for Security_Response Message of Data Size 7 (Chunked bit is set to 0) |
112 | Figure 6-7 Example Security_Request sequence Chunked (Chunked bit = 1) |
113 | Figure 6-8 Example Security_Request Message of Data Size 7 (Chunked bit set to 1) Figure 6-9 Example Chunk 0 of Security_Response Message of Data Size 30 (Chunked bit set to 1) |
114 | 6.3 Control Message Figure 6-10 Example byte transmission for a Security_Request Message Chunk request (Chunked bit is set to 1) Figure 6-11 Example Chunk 1 of Security_Response Message of Data Size 30 (Chunked bit set to 1) Table 6-5 Control Message Types |
115 | 6.3.1 GoodCRC Message 6.3.2 GotoMin Message |
116 | 6.3.3 Accept Message 6.3.4 Reject Message |
117 | 6.3.5 Ping Message 6.3.6 PS_RDY Message 6.3.7 Get_Source_Cap Message 6.3.8 Get_Sink_Cap Message 6.3.9 DR_Swap Message |
118 | 6.3.10 PR_Swap Message 6.3.11 VCONN_Swap Message |
119 | 6.3.12 Wait Message |
120 | 6.3.13 Soft Reset Message |
121 | 6.3.14 Not_Supported Message 6.3.15 Get_Source_Cap_Extended Message 6.3.16 Get_Status Message 6.3.17 FR_Swap Message |
122 | 6.3.18 Get_PPS_Status 6.3.19 Get_Country_Codes 6.4 Data Message |
123 | 6.4.1 Capabilities Message Figure 6-12 Example Capabilities Message with 2 Power Data Objects Table 6-6 Data Message Types |
124 | Table 6-7 Power Data Object Table 6-8 Augmented Power Data Object |
126 | Table 6-9 Fixed Supply PDO – Source |
128 | Table 6-10 Fixed Power Source Peak Current Capability |
129 | Table 6-11 Variable Supply (non-Battery) PDO – Source Table 6-12 Battery Supply PDO – Source |
130 | Table 6-13 Programmable Power Supply APDO – Source Table 6-14 Fixed Supply PDO – Sink |
132 | Table 6-15 Variable Supply (non-Battery) PDO – Sink Table 6-16 Battery Supply PDO – Sink |
133 | 6.4.2 Request Message Table 6-17 Programmable Power Supply APDO – Sink Table 6-18 Fixed and Variable Request Data Object Table 6-19 Fixed and Variable Request Data Object with GiveBack Support |
134 | Table 6-20 Battery Request Data Object |
135 | Table 6-21 Battery Request Data Object with GiveBack Support Table 6-22 Programmable Request Data Object |
138 | 6.4.3 BIST Message Figure 6-13 BIST Message |
139 | 6.4.4 Vendor Defined Message Table 6-23 BIST Data Object |
140 | Figure 6-14 Vendor Defined Message |
141 | Table 6-24 Unstructured VDM Header Table 6-25 Structured VDM Header |
142 | Table 6-26 Structured VDM Commands |
143 | Table 6-27 SVID Values |
145 | Table 6-28 Commands and Responses |
146 | Figure 6-15 Discover Identity Command response Table 6-29 ID Header VDO |
147 | Table 6-30 Product Types (UFP) Table 6-31 Product Types (Cable Plug) |
148 | Table 6-32 Product Types (DFP) Table 6-33 Cert Stat VDO Table 6-34 Product VDO |
149 | Table 6-35 Passive Cable VDO |
151 | Table 6-36 Active Cable VDO |
153 | Table 6-37 AMA VDO |
154 | Table 6-38 VPD VDO |
156 | Figure 6-16 Example Discover SVIDs response with 3 SVIDs Figure 6-17 Example Discover SVIDs response with 4 SVIDs Figure 6-18 Example Discover SVIDs response with 12 SVIDs followed by an empty response Table 6-39 Discover SVIDs Responder VDO |
157 | Figure 6-19 Example Discover Modes response for a given SVID with 3 Modes |
158 | Figure 6-20 Successful Enter Mode sequence |
159 | Figure 6-21 Enter Mode sequence Interrupted by Source Capabilities and then Re-run |
160 | Figure 6-22 Unsuccessful Enter Mode sequence due to NAK |
161 | Figure 6-23 Exit Mode sequence |
162 | Figure 6-24 Attention Command request/response sequence Figure 6-25 Command request/response sequence |
164 | Figure 6-26 Enter/Exit Mode Process |
165 | 6.4.5 Battery_Status Message Figure 6-27 Battery_Status Message Table 6-40 Battery Status Data Object (BSDO) |
166 | 6.4.6 Alert Message Figure 6-28 Alert Message Table 6-41 Alert Data Object |
168 | 6.4.7 Get_Country_Info Message 6.5 Extended Message Figure 6-29 Get_Country_Info Message Table 6-42 Country Code Data Object Table 6-43 Extended Message Types |
169 | 6.5.1 Source_Capabilities_Extended Message Figure 6-30 Source_Capabilities_Extended Message Table 6-44 Source Capabilities Extended Data Block (SCEDB) |
173 | 6.5.2 Status Message |
174 | Figure 6-31 Status Message Table 6-45 Status Data Block (SDB) |
176 | 6.5.3 Get_Battery_Cap Message 6.5.4 Get_Battery_Status Message 6.5.5 Battery_Capabilities Message Figure 6-32 Get_Battery_Cap Message Figure 6-33 Get_Battery_Status Message Table 6-46 Get Battery Cap Data Block (GBCDB) Table 6-47 Get Battery Status Data Block (GBSDB) |
177 | 6.5.6 Get_Manufacturer_Info Message Figure 6-34 Battery_Capabilities Message Table 6-48 Battery Capability Data Block (BCDB) |
178 | 6.5.7 Manufacturer_Info Message Figure 6-35 Get_Manufacturer_Info Message Figure 6-36 Manufacturer_Info Message Table 6-49 Get Manufacturer Info Data Block (GMIDB) Table 6-50 Manufacturer Info Data Block (MIDB) |
179 | 6.5.8 Security Messages |
180 | 6.5.9 Firmware Update Messages Figure 6-37 Security_Request Message Figure 6-38 Security_Response Message Figure 6-39 Firmware_Update_Request Message |
181 | 6.5.10 PPS_Status Message Figure 6-40 Firmware_Update_Response Message Figure 6-41 PPS_Status Message Table 6-51 PPS Status Data Block (PPSSDB) |
182 | 6.5.11 Country_Codes Message 6.5.12 Country_Info Message Figure 6-42 Country_Codes Message Table 6-52 Country Codes Data Block (CCDB) |
183 | 6.6 Timers 6.6.1 CRCReceiveTimer 6.6.2 SenderResponseTimer Figure 6-43 Country_Info Message Table 6-53 Country Info Data Block (CIDB) |
184 | 6.6.3 Capability Timers 6.6.4 Wait Timers and Times |
185 | 6.6.5 Power Supply Timers |
187 | 6.6.6 NoResponseTimer 6.6.7 BIST Timers 6.6.8 Power Role Swap Timers |
188 | 6.6.9 Soft Reset Timers 6.6.10 Hard Reset Timers 6.6.11 Structured VDM Timers |
190 | 6.6.12 Vconn Timers 6.6.13 tCableMessage 6.6.14 DiscoverIdentityTimer 6.6.15 Collision Avoidance Timers |
191 | 6.6.16 tFRSwapInit 6.6.17 Chunking Timers |
192 | 6.6.18 Programmable Power Supply Timers 6.6.19 Time Values and Timers |
193 | Table 6-54 Time Values |
194 | Table 6-55 Timers |
196 | 6.7 Counters 6.7.1 MessageID Counter 6.7.2 Retry Counter |
197 | 6.7.3 Hard Reset Counter 6.7.4 Capabilities Counter 6.7.5 Discover Identity Counter 6.7.6 VDMBusyCounter 6.7.7 Counter Values and Counters Table 6-56 Counter parameters |
198 | 6.8 Reset 6.8.1 Soft Reset and Protocol Error Table 6-57 Counters |
199 | Table 6-58 Response to an incoming Message (except VDM) Table 6-59 Response to an incoming VDM |
200 | 6.8.2 Hard Reset 6.8.3 Cable Reset |
201 | 6.9 Collision Avoidance 6.10 Message Discarding Table 6-60 Message discarding |
202 | 6.11 State behavior 6.11.1 Introduction to state diagrams used in Chapter 6 6.11.2 State Operation Figure 6-44 Outline of States Figure 6-45 References to states |
203 | Figure 6-46 Chunking architecture Showing Message and Control Flow |
205 | Figure 6-47 Chunked Rx State Diagram |
208 | Figure 6-48 Chunked Tx State Diagram |
211 | Figure 6-49 Chunked Message Router State Diagram |
213 | Figure 6-50 Common Protocol Layer Message transmission State Diagram |
216 | Figure 6-51 Source Protocol Layer Message transmission State Diagram |
218 | Figure 6-52 Sink Protocol Layer Message transmission State Diagram |
219 | Figure 6-53 Protocol layer Message reception |
221 | Figure 6-54 Hard/Cable Reset |
224 | 6.11.3 List of Protocol Layer States Table 6-61 Protocol Layer States |
226 | 6.12 Message Applicability |
227 | 6.12.1 Applicability of Control Messages Table 6-62 Applicability of Control Messages |
228 | 6.12.2 Applicability of Data Messages Table 6-63 Applicability of Data Messages |
229 | 6.12.3 Applicability of Extended Messages Table 6-64 Applicability of Extended Messages |
230 | 6.12.4 Applicability of Structured VDM Commands 6.12.5 Applicability of Reset Signaling Table 6-65 Applicability of Structured VDM Commands |
231 | 6.12.6 Applicability of Fast Role Swap signal 6.13 Value Parameters Table 6-66 Applicability of Reset Signaling Table 6-67 Applicability of Fast Role Swap signal Table 6-68 Value Parameters |
232 | 7 Power Supply 7.1 Source Requirements 7.1.1 Behavioral Aspects 7.1.2 Source Bulk Capacitance 7.1.3 Types of Sources Figure 7-1 Placement of Source Bulk Capacitance |
233 | 7.1.4 Source Transitions Figure 7-2 Transition Envelope for Positive Voltage Transitions |
234 | Figure 7-3 Transition Envelope for Negative Voltage Transitions |
235 | Figure 7-4 PPS Positive Voltage Transitions |
236 | Figure 7-5 PPS Negative Voltage Transitions Figure 7-6 Expected PPS Ripple Relative to an LSB |
237 | 7.1.5 Response to Hard Resets Figure 7-7 PPS Programmable Voltage and Foldback |
238 | 7.1.6 Changing the Output Power Capability 7.1.7 Robust Source Operation Figure 7-8 Source VBUS and Vconn Response to Hard Reset |
239 | 7.1.8 Output Voltage Tolerance and Range |
240 | Figure 7-9 Application of vSrcNew and vSrcValid limits after tSrcReady |
241 | 7.1.9 Charging and Discharging the Bulk Capacitance on VBUS 7.1.10 Swap Standby for Sources 7.1.11 Source Peak Current Operation |
242 | 7.1.12 Source Capabilities Extended Parameters Figure 7-10 Source Peak Current Overload |
243 | Figure 7-11 Holdup Time Measurement |
244 | 7.1.13 Fast Role Swap Figure 7-12 VBUS Power during Fast Role Swap |
245 | 7.1.14 Non-application of VBUS Slew Rate Limits 7.2 Sink Requirements 7.2.1 Behavioral Aspects Figure 7-13 VBUS detection and timing during Fast Role Swap |
246 | 7.2.2 Sink Bulk Capacitance 7.2.3 Sink Standby Figure 7-14 Placement of Sink Bulk Capacitance |
247 | 7.2.4 Suspend Power Consumption 7.2.5 Zero Negotiated Current 7.2.6 Transient Load Behavior 7.2.7 Swap Standby for Sinks 7.2.8 Sink Peak Current Operation 7.2.9 Robust Sink Operation |
249 | 7.2.10 Fast Role Swap |
250 | 7.3 Transitions |
251 | 7.3.1 Increasing the Current Figure 7-15 Transition Diagram for Increasing the Current |
252 | Table 7-1 Sequence Description for Increasing the Current |
253 | 7.3.2 Increasing the Voltage Figure 7-16 Transition Diagram for Increasing the Voltage |
254 | Table 7-2 Sequence Description for Increasing the Voltage |
255 | 7.3.3 Increasing the Voltage and Current Figure 7-17 Transition Diagram for Increasing the Voltage and Current |
256 | Table 7-3 Sequence Diagram for Increasing the Voltage and Current |
257 | 7.3.4 Increasing the Voltage and Decreasing the Current Figure 7-18 Transition Diagram for Increasing the Voltage and Decreasing the Current |
258 | Table 7-4 Sequence Description for Increasing the Voltage and Decreasing the Current |
259 | 7.3.5 Decreasing the Voltage and Increasing the Current Figure 7-19 Transition Diagram for Decreasing the Voltage and Increasing the Current |
260 | Table 7-5 Sequence Description for Decreasing the Voltage and Increasing the Current |
261 | 7.3.6 Decreasing the Current Figure 7-20 Transition Diagram for Decreasing the Current |
262 | Table 7-6 Sequence Description for Decreasing the Current |
263 | 7.3.7 Decreasing the Voltage Figure 7-21 Transition Diagram for Decreasing the Voltage |
264 | Table 7-7 Sequence Description for Decreasing the Voltage |
265 | 7.3.8 Decreasing the Voltage and the Current Figure 7-22 Transition Diagram for Decreasing the Voltage and the Current |
266 | Table 7-8 Sequence Description for Decreasing the Voltage and the Current |
267 | 7.3.9 Sink Requested Power Role Swap Figure 7-23 Transition Diagram for a Sink Requested Power Role Swap |
268 | Table 7-9 Sequence Description for a Sink Requested Power Role Swap |
270 | 7.3.10 Source Requested Power Role Swap Figure 7-24 Transition Diagram for a Source Requested Power Role Swap |
271 | Table 7-10 Sequence Description for a Source Requested Power Role Swap |
273 | 7.3.11 GotoMin Current Decrease Figure 7-25 Transition Diagram for a GotoMin Current Decrease |
274 | Table 7-11 Sequence Description for a GotoMin Current Decrease |
275 | 7.3.12 Source Initiated Hard Reset Figure 7-26 Transition Diagram for a Source Initiated Hard Reset |
276 | Table 7-12 Sequence Description for a Source Initiated Hard Reset |
277 | 7.3.13 Sink Initiated Hard Reset Figure 7-27 Transition Diagram for a Sink Initiated Hard Reset |
278 | Table 7-13 Sequence Description for a Sink Initiated Hard Reset |
279 | 7.3.14 No change in Current or Voltage Figure 7-28 Transition Diagram for no change in Current or Voltage |
280 | Table 7-14 Sequence Description for no change in Current or Voltage |
281 | 7.3.15 Fast Role Swap Figure 7-29 Transition Diagram for Fast Role Swap |
282 | Table 7-15 Sequence Description for Fast Role Swap |
283 | 7.3.16 Increasing the Programmable Power Supply Voltage Figure 7-30 Transition Diagram for Increasing the Programmable Power Supply Voltage |
284 | Table 7-16 Sequence Description for Increasing the Programmable Power Supply Voltage |
285 | 7.3.17 Decreasing the Programmable Power Supply Voltage Figure 7-31 Transition Diagram for Decreasing the Programmable Power Supply Voltage |
286 | Table 7-17 Sequence Description for Decreasing the Programmable Power Supply Voltage |
287 | 7.3.18 Changing the Source PDO or APDO Figure 7-32 Transition Diagram for Changing the Source PDO or APDO |
288 | Table 7-18 Sequence Description for Changing the Source PDO or APDO |
289 | 7.4 Electrical Parameters 7.4.1 Source Electrical Parameters Table 7-19 Source Electrical Parameters |
293 | 7.4.2 Sink Electrical Parameters Table 7-20 Sink Electrical Parameters |
294 | 7.4.3 Common Electrical Parameters Table 7-21 Common Source/Sink Electrical Parameters |
296 | 8 Device Policy 8.1 Overview 8.2 Device Policy Manager |
297 | 8.2.1 Capabilities 8.2.2 System Policy 8.2.3 Control of Source/Sink |
298 | 8.2.4 Cable Detection 8.2.5 Managing Power Requirements |
300 | 8.2.6 Use of āUnconstrained Powerā bit with Batteries and AC supplies |
301 | Figure 8-1 Example of daisy chained displays |
302 | 8.2.7 Interface to the Policy Engine |
303 | 8.3 Policy Engine 8.3.1 Introduction 8.3.2 Atomic Message Sequence Diagrams |
304 | Figure 8-2 Basic Message Exchange (Successful) Table 8-1 Basic Message Flow |
305 | Figure 8-3 Basic Message flow indicating possible errors Table 8-2 Potential issues in Basic Message Flow |
306 | Figure 8-4 Basic Message Flow with Bad CRC followed by a Retry Table 8-3 Basic Message Flow with CRC failure |
307 | Table 8-4 Interruptible and Non-interruptible AMS |
309 | Figure 8-5 Successful Power Negotiation Table 8-5 Steps for a successful Power Negotiation |
313 | Figure 8-6 Successful GotoMin operation Table 8-6 Steps for a GotoMin Negotiation |
315 | Figure 8-7 Soft Reset Table 8-7 Steps for a Soft Reset |
318 | Figure 8-8 Source initiated Hard Reset |
319 | Table 8-8 Steps for Source initiated Hard Reset |
321 | Figure 8-9 Sink Initiated Hard Reset |
322 | Table 8-9 Steps for Sink initiated Hard Reset |
324 | Figure 8-10 Source initiated reset – Sink long reset |
325 | Table 8-10 Steps for Source initiated Hard Reset ā Sink long reset |
328 | Figure 8-11 Successful Power Role Swap Sequence Initiated by the Source |
329 | Table 8-11 Steps for a Successful Source Initiated Power Role Swap Sequence |
333 | Figure 8-12 Successful Power Role Swap Sequence Initiated by the Sink |
334 | Table 8-12 Steps for a Successful Sink Initiated Power Role Swap Sequence |
338 | Figure 8-13 Successful Fast Role Swap Sequence |
339 | Table 8-13 Steps for a Successful Fast Role Swap Sequence |
342 | Figure 8-14 Data Role Swap, UFP operating as Sink initiates |
343 | Table 8-14 Steps for Data Role Swap, UFP operating as Sink initiates |
345 | Figure 8-15 Data Role Swap, UFP operating as Source initiates |
346 | Table 8-15 Steps for Data Role Swap, UFP operating as Source initiates |
348 | Figure 8-16 Data Role Swap, DFP operating as Source initiates |
349 | Table 8-16 Steps for Data Role Swap, DFP operating as Source initiates |
351 | Figure 8-17 Data Role Swap, DFP operating as Sink initiates |
352 | Table 8-17 Steps for Data Role Swap, DFP operating as Sink initiates |
354 | Figure 8-18 Source to Sink Vconn Source Swap |
355 | Table 8-18 Steps for Source to Sink Vconn Source Swap |
357 | Figure 8-19 Sink to Source Vconn Source Swap |
358 | Table 8-19 Steps for Sink to Source Vconn Source Swap |
360 | Figure 8-20 Source Alert to Sink Table 8-20 Steps for Source Alert to Sink |
362 | Figure 8-21 Sink Alert to Source Table 8-21 Steps for Sink Alert to Source |
364 | Figure 8-22 Sink Gets Source Status Table 8-22 Steps for a Sink getting Source status Sequence |
366 | Figure 8-23 Source Gets Sink Status Table 8-23 Steps for a Source getting Sink status Sequence |
368 | Figure 8-24 Sink Gets Source PPS Status Table 8-24 Steps for a Sink getting Source PPS status Sequence |
370 | Figure 8-25 Sink Gets Sourceās Capabilities Table 8-25 Steps for a Sink getting Source capabilities Sequence |
372 | Figure 8-26 Dual-Role Source Gets Dual-Role Sinkās Capabilities as a Source Table 8-26 Steps for a Dual-Role Source getting Dual-Role Sinkās capabilitiesas a Source Sequence |
374 | Figure 8-27 Source Gets Sinkās Capabilities Table 8-27 Steps for a Source getting Sink capabilities Sequence |
376 | Figure 8-28 Dual-Role Sink Gets Dual-Role Sourceās Capabilities as a Sink Table 8-28 Steps for a Dual-Role Sink getting Dual-Role Source capabilities as a Sink Sequence |
378 | Figure 8-29 Sink Gets Sourceās Extended Capabilities Table 8-29 Steps for a Sink getting Source extended capabilities Sequence |
380 | Figure 8-30 Dual-Role Source Gets Dual-Role Sinkās Extended Capabilities Table 8-30 Steps for a Dual-Role Source getting Dual-Role Sink extended capabilities Sequence |
382 | Figure 8-31 Sink Gets Sourceās Battery Capabilities Table 8-31 Steps for a Sink getting Source Battery capabilities Sequence |
384 | Figure 8-32 Source Gets Sinkās Battery Capabilities Table 8-32 Steps for a Source getting Sink Battery capabilities Sequence |
386 | Figure 8-33 Sink Gets Sourceās Battery Status Table 8-33 Steps for a Sink getting Source Battery status Sequence |
388 | Figure 8-34 Source Gets Sinkās Battery Status Table 8-34 Steps for a Source getting Sink Battery status Sequence |
390 | Figure 8-35 Source Gets Sinkās Port Manufacturer Information Table 8-35 Steps for a Source getting Sinkās Port Manufacturer information Sequence |
392 | Figure 8-36 Sink Gets Sourceās Port Manufacturer Information Table 8-36 Steps for a Source getting Sinkās Port Manufacturer information Sequence |
394 | Figure 8-37 Source Gets Sinkās Battery Manufacturer Information Table 8-37 Steps for a Source getting Sinkās Battery Manufacturer information Sequence |
396 | Figure 8-38 Sink Gets Sourceās Battery Manufacturer Information Table 8-38 Steps for a Source getting Sinkās Battery Manufacturer information Sequence |
398 | Figure 8-39 Vconn Source Gets Cable Plugās Manufacturer Information Table 8-39 Steps for a Vconn Source getting Sinkās Port Manufacturer information Sequence |
400 | Figure 8-40 Source Gets Sinkās Country Codes Table 8-40 Steps for a Source getting Country Codes Sequence |
402 | Figure 8-41 Sink Gets Sourceās Country Codes Table 8-41 Steps for a Source getting Sinkās Country Codes Sequence |
404 | Figure 8-42 Vconn Source Gets Cable Plugās Country Codes Table 8-42 Steps for a Vconn Source getting Sinkās Country Codes Sequence |
406 | Figure 8-43 Source Gets Sinkās Country Information Table 8-43 Steps for a Source getting Country Information Sequence |
408 | Figure 8-44 Sink Gets Sourceās Country Information Table 8-44 Steps for a Source getting Sinkās Country Information Sequence |
410 | Figure 8-45 Vconn Source Gets Cable Plugās Country Information Table 8-45 Steps for a Vconn Source getting Sinkās Country Information Sequence |
412 | Figure 8-46 Source requests security exchange with Sink Table 8-46 Steps for a Source requesting a security exchange with a Sink Sequence |
414 | Figure 8-47 Sink requests security exchange with Source Table 8-47 Steps for a Sink requesting a security exchange with a Source Sequence |
416 | Figure 8-48 Vconn Source requests security exchange with Cable Plug Table 8-48 Steps for a Vconn Source requesting a security exchange with a Cable Plug Sequence |
418 | Figure 8-49 Source requests firmware update exchange with Sink Table 8-49 Steps for a Source requesting a firmware update exchange with a Sink Sequence |
420 | Figure 8-50 Sink requests firmware update exchange with Source Table 8-50 Steps for a Sink requesting a firmware update exchange with a Source Sequence |
422 | Figure 8-51 Vconn Source requests firmware update exchange with Cable Plug Table 8-51 Steps for a Vconn Source requesting a firmware update exchange with a Cable Plug Sequence |
424 | Figure 8-52 DFP to UFP Discover Identity Table 8-52 Steps for DFP to UFP Discover Identity |
426 | Figure 8-53 Source Port to Cable Plug Discover Identity Table 8-53 Steps for Source Port to Cable Plug Discover Identity |
429 | Figure 8-54 DFP to Cable Plug Discover Identity Table 8-54 Steps for DFP to Cable Plug Discover Identity |
432 | Figure 8-55 DFP to UFP Enter Mode Table 8-55 Steps for DFP to UFP Enter Mode |
434 | Figure 8-56 DFP to UFP Exit Mode Table 8-56 Steps for DFP to UFP Exit Mode |
436 | Figure 8-57 DFP to Cable Plug Enter Mode |
437 | Table 8-57 Steps for DFP to Cable Plug Enter Mode |
439 | Figure 8-58 DFP to Cable Plug Exit Mode Table 8-58 Steps for DFP to Cable Plug Exit Mode |
442 | Figure 8-59 UFP to DFP Attention Table 8-59 Steps for UFP to DFP Attention |
444 | Figure 8-60 BIST Carrier Mode Test |
445 | Table 8-60 Steps for BIST Carrier Mode Test |
446 | Figure 8-61 BIST Test Data Test |
447 | Table 8-61 Steps for BIST Test Data Test |
449 | 8.3.3 State Diagrams Figure 8-62 Outline of States Figure 8-63 References to states |
450 | Figure 8-64 Example of state reference with conditions Figure 8-65 Example of state reference with the same entry and exit |
451 | Figure 8-66 Source Port Policy Engine State Diagram |
458 | Figure 8-67 Sink Port State Diagram |
463 | Figure 8-68 Source Port Soft Reset and Protocol Error State Diagram |
464 | Figure 8-69 Sink Port Soft Reset and Protocol Error Diagram |
466 | Figure 8-70 Source Port Not Supported Message State Diagram |
467 | Figure 8-71 Sink Port Not Supported Message State Diagram |
468 | Figure 8-72 Source Port Ping State Diagram Figure 8-73 Source Port Source Alert State Diagram |
469 | Figure 8-74 Sink Port Source Alert State Diagram Figure 8-75 Sink Port Sink Alert State Diagram Figure 8-76 Source Port Sink Alert State Diagram |
470 | Figure 8-77 Sink Port Get Source Capabilities Extended State Diagram Figure 8-78 Source Give Source Capabilities Extended State Diagram |
471 | Figure 8-79 Sink Port Get Source Status State Diagram Figure 8-80 Source Give Source Status State Diagram |
472 | Figure 8-81 Source Port Get Sink Status State Diagram Figure 8-82 Sink Give Sink Status State Diagram |
473 | Figure 8-83 Sink Port Get Source PPS Status State Diagram Figure 8-84 Source Give Source PPS Status State Diagram |
474 | Figure 8-85 Get Battery Capabilities State Diagram |
475 | Figure 8-86 Give Battery Capabilities State Diagram Figure 8-87 Get Battery Status State Diagram |
476 | Figure 8-88 Give Battery Status State Diagram Figure 8-89 Get Manufacturer Information State Diagram |
477 | Figure 8-90 Give Manufacturer Information State Diagram Figure 8-91 Get Country Codes State Diagram |
478 | Figure 8-92 Give Country Codes State Diagram Figure 8-93 Get Country Information State Diagram |
479 | Figure 8-94 Give Country Information State Diagram Figure 8-95 Send security request State Diagram |
480 | Figure 8-96 Send security response State Diagram Figure 8-97 Security response received State Diagram |
481 | Figure 8-98 Send firmware update request State Diagram Figure 8-99 Send firmware update response State Diagram |
482 | Figure 8-100 Firmware update response received State Diagram |
483 | Figure 8-101: DFP to UFP Data Role Swap State Diagram |
485 | Figure 8-102: UFP to DFP Data Role Swap State Diagram |
488 | Figure 8-103: Dual-Role Port in Source to Sink Power Role Swap State Diagram |
491 | Figure 8-104: Dual-role Port in Sink to Source Power Role Swap State Diagram |
494 | Figure 8-105: Dual-Role Port in Source to Sink Fast Role Swap State Diagram |
497 | Figure 8-106: Dual-role Port in Sink to Source Fast Role Swap State Diagram |
499 | Figure 8-107 Dual-Role (Source) Get Source Capabilities diagram Figure 8-108 Dual-Role (Source) Give Sink Capabilities diagram |
500 | Figure 8-109 Dual-Role (Sink) Get Sink Capabilities State Diagram |
501 | Figure 8-110 Dual-Role (Sink) Give Source Capabilities State Diagram Figure 8-111 Dual-Role (Source) Get Source Capabilities Extended State Diagram |
502 | Figure 8-112 Dual-Role (Source) Give Sink Capabilities diagram |
503 | Figure 8-113 VCONN Swap State Diagram |
506 | Figure 8-114 Initiator to Port VDM Discover Identity State Diagram |
507 | Figure 8-115 Initiator VDM Discover SVIDs State Diagram |
508 | Figure 8-116 Initiator VDM Discover Modes State Diagram |
509 | Figure 8-117 Initiator VDM Attention State Diagram Figure 8-118 Responder Structured VDM Discover Identity State Diagram |
510 | Figure 8-119 Responder Structured VDM Discover SVIDs State Diagram |
511 | Figure 8-120 Responder Structured VDM Discover Modes State Diagram |
512 | Figure 8-121 Receiving a Structured VDM Attention State Diagram |
513 | Figure 8-122 DFP VDM Mode Entry State Diagram |
514 | Figure 8-123 DFP VDM Mode Exit State Diagram |
515 | Figure 8-124 UFP Structured VDM Enter Mode State Diagram |
516 | Figure 8-125 UFP Structured VDM Exit Mode State Diagram |
517 | Figure 8-126 Cable Ready VDM State Diagram Figure 8-127 Cable Plug Soft Reset State Diagram |
518 | Figure 8-128 Cable Plug Hard Reset State Diagram |
519 | Figure 8-129 DFP Soft Reset or Cable Reset of a Cable Plug State Diagram |
520 | Figure 8-130 UFP Source Soft Reset of a Cable Plug State Diagram |
521 | Figure 8-131 Source Startup Structured VDM Discover Identity State Diagram |
523 | Figure 8-132 Cable Plug Structured VDM Enter Mode State Diagram |
524 | Figure 8-133 Cable Plug Structured VDM Exit Mode State Diagram |
525 | Figure 8-134 BIST Carrier Mode State Diagram |
527 | Table 8-62 Policy Engine States |
534 | 9 States and Status Reporting 9.1 Overview |
535 | Figure 9-1 Example PD Topology |
537 | 9.1.1 PDUSB Device and Hub Requirements Figure 9-2 Mapping of PD Topology to USB |
538 | 9.1.2 Mapping to USB Device States Figure 9-3 USB Attached to USB Powered State Transition |
539 | Figure 9-4 Any USB State to USB Attached State Transition (When operating as a Consumer) Figure 9-5 Any USB State to USB Attached State Transition (When operating as a Provider) |
540 | 9.1.3 PD Software Stack 9.1.4 PDUSB Device Enumeration Figure 9-6 Any USB State to USB Attached State Transition (After a USB Type-C Data Role Swap) Figure 9-7 Software stack on a PD aware OS |
541 | Figure 9-8 Enumeration of a PDUSB Device |
542 | 9.2 PD Specific Descriptors 9.2.1 USB Power Delivery Capability Descriptor Table 9-1 USB Power Delivery Type Codes Table 9-2 USB Power Delivery Capability Descriptor |
543 | 9.2.2 Battery Info Capability Descriptor |
544 | 9.2.3 PD Consumer Port Capability Descriptor Table 9-4 PD Consumer Port Descriptor |
545 | 9.2.4 PD Provider Port Capability Descriptor Table 9-5 PD Provider Port Descriptor |
546 | 9.3 PD Specific Requests and Events 9.3.1 PD Specific Requests Table 9-6 PD Requests Table 9-7 PD Request Codes Table 9-8 PD Feature Selectors |
547 | 9.4 PDUSB Hub and PDUSB Peripheral Device Requests 9.4.1 GetBatteryStatus Table 9-9 Battery Status Structure |
548 | 9.4.2 SetPDFeature |
549 | Table 9-10 Battery Wake Mask Table 9-11 Charging Policy Encoding |
551 | 10 Power Rules 10.1 Introduction 10.2 Source Power Rules 10.2.1 Source Power Rule Considerations Table 10-1 Considerations for Sources |
552 | 10.2.2 Normative Voltages and Currents Figure 10-1 Source Power Rule Illustration Table 10-2 Normative Voltages and Currents |
553 | Figure 10-2 Source Power Rule Example Table 10-3 Fixed Supply PDO ā Source 5V |
554 | Table 10-4 Fixed Supply PDO ā Source 9V Table 10-5 Fixed Supply PDO ā Source 15V Table 10-6 Fixed Supply PDO ā Source 20V |
555 | 10.2.3 Optional Voltages/Currents Table 10-7 Programmable Power Supply PDOs and APDOs based on the PDP |
556 | Table 10-8 Programmable Power Supply Voltage Ranges |
557 | 10.2.4 Power sharing between ports 10.3 Sink Power Rules 10.3.1 Sink Power Rule Considerations 10.3.2 Normative Sink Rules A. CRC calculation A.1 C code example |
559 | A.2 Table showing the full calculation over one Message |
560 | B. PD Message Sequence Examples B.1 External power B.1 is supplied downstream Figure B1 External Power supplied downstream |
561 | Table B1 External power is supplied downstream |
564 | B.2 External power is supplied upstream Figure B2 External Power supplied upstream |
565 | Table B2 External power is supplied upstream |
572 | B.3 Giving back power Figure B3 Giving Back Power Table B3 Giving back power |
585 | C. VDM Command Examples C.1 Discover Identity Example Table C1 Discover Identity Command request from Initiator Example |
586 | Table C2 Discover Identity Command response from Active Cable Responder Example |
587 | Table C3 Discover Identity Command response from Hub Responder Example |
588 | C.2 Discover SVIDs Example Table C4 Discover SVIDs Command request from Initiator Example Table C5 Discover SVIDs Command response from Responder Example |
590 | C.3 Discover Modes Example Table C6 Discover Modes Command request from Initiator Example Table C7 Discover Modes Command response from Responder Example |
592 | C.4 Enter Mode Example Table C8 Enter Mode Command request from Initiator Example Table C9 Enter Mode Command response from Responder Example |
593 | Table C10 Enter Mode Command request from Initiator Example |
594 | C.5 Exit Mode Example Table C11 Exit Mode Command request from Initiator Example Table C12 Exit Mode Command response from Responder Example |
596 | C.6 Attention Example Table C13 Attention Command request from Initiator Example Table C14 Attention Command request from Initiator with additional VDO Example |
597 | D. BMC Receiver Design Examples D.1 Finite Difference Scheme Figure D1 Circuit Block of BMC Finite Difference Receiver |
598 | Figure D2 BMC AC and DC noise from VBUS at Power Sink Figure D3 Sample BMC Signals (a) without [USB 2.0] SE0 Noise (b) with [USB 2.0] SE0 Noise |
599 | Figure D4 Scaled BMC Signal Derivative with 50ns Sampling Rate (a) without [USB 2.0] Noise (b) with [USB 2.0] Noise Figure D5 BMC Signal and Finite Difference Output with Various Time Steps |
600 | D.2 Subtraction Scheme Figure D6 Output of Finite Difference in dash line and Edge Detector in solid line Figure D7 Noise Zone and Detect Zone of BMC Receiver |
601 | Figure D8 Circuit Block of BMC Subtraction Receiver Figure D9 (a) Output of LPF1 and LPF2 (b) Subtraction of LPF1 and LPF2 Output |
602 | Figure D10 Output of the BMC LPF1 in blue dash curve and the Subtractor in red solid curve (a) at Power Source (b) at Power Sink |